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 FST34170 17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
October 2000 Revised December 2000
FST34170 17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST34170 is a 17-bit to 34-bit highspeed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device can be used in applications where two buses need to be addressed simultaneously. The FST34170 is designed so that the A Port demultiplexes into B1 or B2 or both. Two select (SEL1, SEL 2) inputs provide switch enable control.
Features
s Slower Output Enable times prevent signal disruption s 4 switch connection between two ports. s Minimal propagation delay through the switch. s Low lCC. s Zero bounce in flow-through mode. s Control inputs compatible with TTL level. s See Applications Note AN-5008 for details
Ordering Code:
Order Number FST34170MTD Package Number MTD56 Package Description 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Inputs SEL1 L H L H SEL2 H L L H Function x A = x B1 x A = x B2 x A = x B1 and x B2 Switch Open
Pin Descriptions
Pin Name SEL1, SEL2 A B1, B2 Description Select Inputs Bus A Bus B
UHC is a trademark of Fairchild Semiconductor Corporation.
(c) 2000 Fairchild Semiconductor Corporation
DS500450
www.fairchildsemi.com
FST34170
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC ) DC Switch Voltage (VS) (Note 2) DC Input Control Pin Voltage (VIN) (Note 3) DC Input Diode Current (lIK) VIN < 0V DC Output Current (IOUT) DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG)
-0.5V to +7.0V -0.5V to +7.0V -0.5V to +7.0V -50 mA
128 mA
Recommended Operating Conditions (Note 4)
Power Supply Operating (VCC) Input Voltage (VIN) Output Voltage (VOUT) Input Rise and Fall Time (tr, tf) Switch Control Input Switch I/O Free Air Operating Temperature (TA) 0nS/V to 5nS/V 0nS/V to DC 4.0V to 5.5V 0V to 5.5V 0V to 5.5V
+/- 100 mA -65C to +150 C
-40 C to +85 C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: VS is the voltage observed/applied at either the A or B Ports across the switch. Note 3: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
TA = -40 C to +85 C Symbol Parameter VCC (V) VIK VIH VIL II IOZH, IOZL IOZH, IOZL RON Clamp Diode Voltage HIGH Level Input Voltage LOW Level Input Voltage Input Leakage Current OFF-STATE Leakage Current OFF-STATE Leakage Current Switch On Resistance (Note 6) 4.5 4.0-5.5 4.0-5.5 5.5 0 5.5 5.5 4.5 4.5 4.5 4.0 ICC ICC Quiescent Supply Current Increase in ICC per Input 5.5 5.5 4 4 8 11 2.0 0.8 1.0 10 1.0 1.0 7 7 14 20 3 2.5 Min Typ (Note 5) -1.2 V V V A A A A A mA 0 VIN 5.5V VIN = 5.5V 0 A, VCC, V 0 B, VCC, V VIN = 0V, IIN = 64 mA VIN = 0V, IIN = 30 mA VIN = 2.4V, IIN = 15 mA VIN = 2.4V, IIN = 15 mA VIN = VCC or GND, IOUT = 0 One input at 3.4V Other inputs at VCC or GND
Note 5: Typical values are at VCC = 5.0V and T A = +25C Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins.
Max
Units IIN = -18mA
Conditions
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2
FST34170
AC Electrical Characteristics
TA = -40 C to +85 C, Symbol Parameter CL = 50 pF, RU= RD = 500 VCC = 4.5 - 5.5V Min tPHL, tPLH tPZH tPZL tPHZ tPLZ A or B, to B or A (Note 7) Output Enable Time, SEL to A, B Output Enable Time, SEL to A, B Output Disable Time, SEL to A, B Output Disable Time, SEL to A, B 7.0 7.0 1.0 1.0 Max 0.25 30.0 30.0 6.9 7.7 VCC = 4.0V Min Max 0.25 35.0 35.0 7.3 7.7 ns ns ns ns ns VI = OPEN VI = OPEN for tPZH VI = 7V for tPZL VI = OPEN for tPHZ VI = 7V for tPLZ Figures 1, 2 Figures 1, 2 Figures 1, 2 Figures 1, 2 Figures 1, 2 Units Conditions Figure No.
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol CIN CI/O OFF
(Note 8)
Typ 4 8 Max Units pF pF Conditions VCC = 5.0V VCC = 5.0V, Switch OFF
Parameter Control pin Input Capacitance Input/Output Capacitance "OFF State"
Note 8: TA = +25C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 source terminated in 50 Note: C L includes load and stray capacitance, CL = 50 pF Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST34170 17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild's proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 4 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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